Surely enough, the main May’s newsmaker in the world of technics is SpaceX with the first in history commercial lunch of a rocket having astronauts onboard. Here are some other updates from the world of electronics and hardware design you could miss.
Recently engineers of EDALITY have completed another Signal Integrity (SI) analysis assignment. As it happens often, we managed to improve the quality of high-speed interface before it became a real hardware problem.
We often use the term DFM/DFA verification while discussing with partners a development scope. Sometimes our colleagues are not fully aware of the meaning of this quality control step. Hereby we provide a short explanation of the meaning of the abbreviations DFM (Design for Manufacturability) and DFA (Design for Assembly) and elaborate on why they are so important.
“High-speed signal” is a widely used term, somehow rarely explained. Development of electronic boards with high-speed circuits requires specific knowledge and experience. Design of such PCBs means the necessity to follow the strict implicit size and spacing constraints and technology limitations that make possible to transmit accurate information on very high speed of switching a useful signal.
On March 23, 2020, SGeT group has unveiled a new specification on the latest SMARC (Smart Mobility Architecture) standard, SMARC 2.1. This is the fourth version of a highly-popular edge-type module suitable for various industrial and telecom applications.
A well-known memo reminding about the dependency of a PCB trace impedance parameter from length and cross-section of the actual line.
EDALITY has released many PCB layouts intended for usage in different industries. We cooperated with different companies and engineers who were sharing with us various approaches to the development process and applied requirements traditional for alternative engineering schools.
Having this rich experience of partnering with best specialists in electronics we developed a complex of measures providing the best quality of a PCB design at the end of every project engineering cycle. It contains a few important stages described below.
A new useful tip from the engineering team of EDALITY. Do not underestimate the importance of Power Integrity analysis to avoide smoke in your office!
The team of EDALITY has prepared a nice piece of graphics illustrating the necessity of Signal Integrity analysis in short.
Professionals working with schematic and PCB designs know that noise ripple in a power distribution network (PDN) is one of the most harmful things for an electronic device. Getting an inoperative device from the first start is real here. But the worst possible case is to find a problem while thousands of units are already made and some of them are failing due to excessive ripple in the PDN. So, how to avoid any harm from noise ripple in a PDN? Options are there!
Nowadays, with each subsequent analysis, we and our customers become more and more convinced of how important to perform the Power Integrity (PI) analysis of a PCB with high currents flow. Today we would like to unveil one of the many possible Power integrity issues that your design may contain and which you do not suspect. This issue is called Max Via current.
‘Everything is changing. Designing electronics 10 years ago and now has a big difference and needs new methods and approaches today. The things that before could be stayed without attention can’t be ignored anymore.’ – we many times read this in numerous articles and guidelines. Probably, everyone already understands this, as well as the necessity of Signal integrity and Power integrity analyses! But most of the companies still don’t know how to put the analyses in the project scope, because of the tight schedule for PCB design and absence of Signal integrity specialists in a team.
Imagine after covering all the known requirements you are getting close to the final step of your PCB design. But suddenly you feel doubts if your board may function as it is supposed to. Then you start recalling all the things that still can go wrong — did I make any mistakes during routing? Did the initial specification requirements where copied mistakenly from another project with no changes? How good was the reference design that I’ve used? Sometimes it is just so hard to feel confident about delivered PCB.
